The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2006
Filed:
Apr. 23, 2003
Asit S. Ambekar, Austin, TX (US);
Dung Q. Nguyen, Austin, TX (US);
Raymond C. Yeung, Austin, TX (US);
Asit S. Ambekar, Austin, TX (US);
Dung Q. Nguyen, Austin, TX (US);
Raymond C. Yeung, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A single rename register array is used in an SMT processor. Two bits are added to each register address of the rename register array, one for bit for thread zero (CTB) and one bit for thread one (CTB). The CTB bits are all set to a logic value on power on or start-up. A control instruction (CI) that sets control bits used by other instructions is assigned a register in the rename register array having an address designated as pointer (PTR) address. When a control instruction with an assigned entry with PTR address M completes, then the CTB bit at the PTR address M is flipped to its opposite logic state; likewise, its Valid bit is set to a 'not' Valid state. The self resetting CTB bit is used to determine whether an issued instruction sources a register in the rename register array or a corresponding architected register.