The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 15, 2006
Filed:
May. 18, 2004
Yasuaki Iwase, Tenri, JP;
Yoshifumi Yaoi, Yamatokoriyama, JP;
Hiroshi Iwata, Ikoma-gun, JP;
Akihide Shibata, Nara, JP;
Yoshinao Morikawa, Ikoma, JP;
Masaru Nawaki, Nara, JP;
Yasuaki Iwase, Tenri, JP;
Yoshifumi Yaoi, Yamatokoriyama, JP;
Hiroshi Iwata, Ikoma-gun, JP;
Akihide Shibata, Nara, JP;
Yoshinao Morikawa, Ikoma, JP;
Masaru Nawaki, Nara, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A semiconductor memory device includes a controller programming a nonvolatile memory cell by applying a first pulse so that a charge amount smaller than a target charge amount is accumulated in the nonvolatile memory cell, a second pulse train so that a second charge amount smaller than the target charge amount and larger than the first charge amount is accumulated in the nonvolatile memory cell, and a third pulse train so that a third charge amount falling within an allowable error range of the target charge amount is accumulated. The semiconductor memory cell includes a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, diffusion regions disposed on both sides of the channel region and memory functional units formed on both sides of the gate electrode.