The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2006
Filed:
Aug. 14, 2003
Amar Guettaf, Sunnyvale, CA (US);
Amar Guettaf, Sunnyvale, CA (US);
Broadcom Corporation, Irvine, CA (US);
Abstract
Circuits and a method to enhance scan testing by controlling clock pulses that are provided to flip-flops within an integrated circuit are provided. An integrated circuit is provided that includes a scan testing clock control circuit for flip-flops. The scan testing clock control circuit enables control of a clock input signal to one or more flip-flops within the integrated circuit. In one embodiment, a scan testing clock control circuit can be used to ensure that a flip-flop receives a clock input signal during scan testing. In one embodiment the scan testing clock control circuit includes a latch, and an AND gate. A method for scan testing using a scan testing clock control circuit for flip-flops is also provided.