The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2006

Filed:

Feb. 19, 2003
Applicants:

Teruaki Uehara, Tokyo, JP;

Keitaro Ishida, Tokyo, JP;

Inventors:

Teruaki Uehara, Tokyo, JP;

Keitaro Ishida, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/499 (2006.01);
U.S. Cl.
CPC ...
Abstract

A computation circuit which can obtain n+m-digit accumulation results by using an n-digit computation unit. This computation circuit comprises a computation unit which performs additions of n-digit data; an m-digit up/down counter; and a control circuit which uses the up/down counter to generate the upper m digits of the computation result. In a preferred embodiment, the control circuit increments by one the up/down counter when carry-over occurs in the computation unit, and when the input data of the computation unit is negative, decrements by one the up/down counter. In another preferred embodiment, the control circuit increments or decrements by one the up/down counter when positive or negative overflow occurs in the computation unit, and decrements by one the up/down counter when the final computation result of the computation unit is negative or is a positive number greater than 2−1.


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