The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 08, 2006
Filed:
Feb. 09, 2005
Yasumichi Mori, Ikoma, JP;
Takahiko Yoshimoto, Kitakatsuragi-gun, JP;
Masahiko Watanabe, Ikoma-gun, JP;
Shinsuke Anzai, Tenri, JP;
Takeshi Nojima, Nara, JP;
Munetaka Masaki, Sakurai, JP;
Yasumichi Mori, Ikoma, JP;
Takahiko Yoshimoto, Kitakatsuragi-gun, JP;
Masahiko Watanabe, Ikoma-gun, JP;
Shinsuke Anzai, Tenri, JP;
Takeshi Nojima, Nara, JP;
Munetaka Masaki, Sakurai, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
Two bias circuits which supply a current to a selected memory cell and a reference memory cell have the same circuit constitution. Each bias circuit includes a first active element between a power supply node and a junction node, where a current is controlled to prevent a voltage level at the junction node from fluctuating, a second active element between the power supply node and an output node, where a current is controlled such that a voltage level at the output node is changed in direction opposite to a voltage level at the junction node in other bias circuit, a third active element and a fourth active element between the junction node and a current supply node and between the output node and the current supply node, respectively, where a bias voltage is adjusted.