The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2006

Filed:

Dec. 31, 2003
Applicant:

Eric David Blom, Wakefield, MA (US);

Inventor:

Eric David Blom, Wakefield, MA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/693 (2006.01); H03K 19/094 (2006.01);
U.S. Cl.
CPC ...
Abstract

A tri-level decoder circuit includes a first decoder circuit and a second decoder circuit. The first decoder circuit is configured to compare an input voltage to a first threshold, and the second decoder circuit is configured to compare the input voltage to a second threshold. The first decoder circuit is configured to provide substantially no current to a current mirror if the input voltage is less than the first threshold, and to provide a current to the current mirror otherwise. The current mirror is configured to reflect the current to provide a reflected current. A current source is configured to pull down a first output node to a first logic level if the reflected current is substantially zero. The current mirror is configured to drive the first output node to a second logic level otherwise. The second decoder circuit may operate similarly.


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