The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2006
Filed:
Aug. 04, 2003
Applicants:
Jeffrey D. Stroomer, Lafayette, CO (US);
Roger B. Milne, Boulder, CO (US);
Haibing MA, Superior, CO (US);
Jonathan B. Ballagh, Longmont, CO (US);
Inventors:
Jeffrey D. Stroomer, Lafayette, CO (US);
Roger B. Milne, Boulder, CO (US);
Haibing Ma, Superior, CO (US);
Jonathan B. Ballagh, Longmont, CO (US);
Assignee:
Xilinx, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
Method and apparatus for preparing a design in a high-level modeling system. Hardware description language (HDL) code is generated for one or more of a plurality of high-level subsystems in a high-level design tagged by the user for HDL code generation. Previously generated HDL code may be reused instead of generating new HDL code for each subsystem tagged by the user for HDL code reuse.