The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2006

Filed:

Aug. 27, 2003
Applicants:

William Delaney, Wichita, KS (US);

William Hetrick, Wichita, KS (US);

Charles Nichols, Wichita, KS (US);

Inventors:

William Delaney, Wichita, KS (US);

William Hetrick, Wichita, KS (US);

Charles Nichols, Wichita, KS (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and systems for managing control structure access by a processor are disclosed. In general, a processor can communicate with a plurality of control structures. A memory window manager can then be implemented, which communicates with said processor and said plurality of control structures. The memory window manager specifies which control structure among said plurality of control structures is accessible by said processor. The memory window manager also specifies which control structure can be mapped into an address space of said processor.


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