Analog filter suitable for smoothing a ΔΣ-modulated signal

Abstract

An analog filter includes a first arithmetic operation sectionhaving a plurality of sets of processing circuit being cascade connected, each processing circuit having an S/H circuit of plural stages for holding a ΔΣ-modulated signal and an analog adder for adding the input and output signals of the S/H circuit, in which the number of stages of the S/H circuitsanddecreases toward the end of cascade connection, and a second arithmetic operation sectionconfigured in the same way, which are cascade connected. By using such an analog filter, over sampling and convolution of a ΔΣ-modulated signal are conducted so that the envelope of the filter output may be a quadratic curve of finite carrier that converges to zero at finite sampling points to prevent phase distortion of an LPF and a discretization error due to a conventional function. Compared with a conventional circuit for over-sampling and convolution, the number of stages of the S/H circuits and the number of adders are small.