The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2006

Filed:

Mar. 31, 2000
Applicant:

Val Teodorescu, Plano, TX (US);

Inventor:

Val Teodorescu, Plano, TX (US);

Assignee:

Alcatel, Paris, FR;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J 1/16 (2006.01); H04J 3/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

An alarm collection and routing method using a multi-stage clock distribution scheme in a signaling server organized into a plurality of uniquely addressable shelves. The signaling server includes a system timing generator, one or more clock distribution modules arranged in a nested hierarchical manner, and a plurality of bus control modules, wherein each bus control module interfaces with at least a portion of line cards disposed in a shelf. The system timing generator provides a framed serial control signal, SFI, for controlling the operation of the multi-stage clock distribution scheme, which encodes the IDs of the clock distribution modules and bus control modules. Each bus control module generates a Status signal, encoding it with alarm data and line card status information. The Status signals from the bus control modules are received by the clock distribution modules connected thereto and are multiplexed into a serial TDM bitstream (EAS signal) by each clock distribution module based on its ID. Multiplexed EAS signals are successively provided to higher levels of clock distribution modules, if any, in the nested hierarchy, each of which multiplexes the received EAS signals into a TDM bitstream having an aggregation of lower level alarm/status data as well as alarms produced at that level. The TDM EAS signal is ultimately provided to the system timing generator for appropriate action under the control of a suitable computing element.


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