The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2006

Filed:

Nov. 18, 2004
Applicants:

Scott I. Remington, Austin, TX (US);

James D. Burnett, Austin, TX (US);

Inventors:

Scott I. Remington, Austin, TX (US);

James D. Burnett, Austin, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A static random access memory () has a normal mode of operation and a low voltage mode of operation. A memory array () includes memory cells () coupled to a first power supply node (V) for receiving a power supply voltage. A plurality of word line drivers is coupled to word lines of the memory array () and to a second power supply node (). A word line driver voltage reduction circuit () has an input coupled to the first power supply node (V) and an output coupled to the second power supply node () for reducing a voltage on the output in relation to a voltage on the input in response to a low power supply voltage signal, and thus improving a static noise margin of the memory cells ().


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