The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2006

Filed:

Sep. 10, 2004
Applicants:

Shunichi Iwanari, Soraku-gun, JP;

Masahiko Sakagami, Kameoka, JP;

Yasuo Murakuki, Kyotanabe, JP;

Inventors:

Shunichi Iwanari, Soraku-gun, JP;

Masahiko Sakagami, Kameoka, JP;

Yasuo Murakuki, Kyotanabe, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device having a semiconductor substrate includes a plurality of reference cellsand a plurality of bit lines. The reference cellsare formed in a region near the centerline of a predetermined region of the semiconductor substrate which is perpendicular to the bit lines. The bit linesform pairs each composed of two adjacent bit lines. Two bit linesin each pair have a first parallel state and a second parallel state in which positions of the two bit lines are reversed from the first parallel state. Each pair of bit lineshas at least one cross sectionwhere one of the pair of bit linescrosses the other, to switch between the first parallel state and the second parallel state. The cross sectionis provided in the predetermined region of the semiconductor substrate such that the length of a bit linein the first parallel state is equal to the length of the bit linein the second parallel state. The semiconductor memory device is reduced in size.


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