The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2006
Filed:
Jul. 22, 2004
Wen-shiung Weng, Hsin Tien, TW;
Ming-chun Chang, Chia Yi, TW;
Chi-kung Kuan, Tao Yuan, TW;
Yi-shu Chang, Tai Nan, TW;
Kuo-lin Tai, Chu Pei, TW;
Wen-Shiung Weng, Hsin Tien, TW;
Ming-Chun Chang, Chia Yi, TW;
Chi-Kung Kuan, Tao Yuan, TW;
Yi-Shu Chang, Tai Nan, TW;
Kuo-Lin Tai, Chu Pei, TW;
Realtek Semiconductor Corp., Hsin Chu, TW;
Abstract
A signal generator for generating a clock with lower jitter. The signal generator includes a multi-phase clock generator for generating a plurality of multi-phase reference clocks with same frequency, a multiplexer for selecting one reference clock as an output clock according to a phase selecting signal, a phase-swallow control unit having a comparator for comparing a swallow value with a reference value out of order and outputting the comparing result as a swallow control signal, and a clock selector for receiving the swallow control signal and generating the phase selecting signal. Because the reference value is provided by a counter in bit-reversed, the swallow control signal is dispersed smoothly and the jitter of the output clock is reduced.