The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2006

Filed:

Apr. 08, 2003
Applicants:

Yoshiyuki Kosaka, Oumihachiman, JP;

Kazuyasu Sugisawa, Moriyama, JP;

Kimihiro Yamanaka, Shiga-ken, JP;

Inventors:

Yoshiyuki Kosaka, Oumihachiman, JP;

Kazuyasu Sugisawa, Moriyama, JP;

Kimihiro Yamanaka, Shiga-ken, JP;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R 12/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multilayer printed circuit board is provided in which microcracks or metallic migration is mitigated when a Resin Fill Plated Through Hole (RFP) is arranged near the edge thereof. The multilayer printed circuit board includes an inner layer having an RFP, outer layers, RFP lands, and conductor layers. The conductor layers are positioned over the RFP lands and the outer edges of the conductor layers extends outward further than the outer edges of the RFP lands. When the multilayer printed circuit board is heated, a stress is generated in and near the RFP. The conductor layers positioned so as to cover the RFP lands, exert a reaction against the stress to suppress generation of microcracks in the multilayer printed circuit board and thereby mitigate metallic migration in the board.


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