The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2006
Filed:
Oct. 09, 2003
Moon-chul Lee, Sungnam, KR;
Hyung Choi, Sungnam, KR;
Kyu-dong Jung, Suwon, KR;
MI Jang, Suwon, KR;
Seog-woo Hong, Busan, KR;
Seok-whan Chung, Suwon, KR;
Chan-bong Jun, Seoul, KR;
Seok-jin Kang, Suwon, KR;
Moon-chul Lee, Sungnam, KR;
Hyung Choi, Sungnam, KR;
Kyu-dong Jung, Suwon, KR;
Mi Jang, Suwon, KR;
Seog-woo Hong, Busan, KR;
Seok-whan Chung, Suwon, KR;
Chan-bong Jun, Seoul, KR;
Seok-jin Kang, Suwon, KR;
Samsung Electronics Co., Ltd., Suwon, KR;
Abstract
A method of forming a via hole through a glass wafer includes depositing a material layer on an outer surface of the glass wafer, the material layer having a selection ratio higher than that of the glass wafer, forming a via-patterned portion on one side of the material layer, performing a first etching in which the via-patterned portion is etched to form a preliminary via hole, eliminating any remaining patterning material used in the formation of the via-patterned portion, performing a second etching in which the preliminary via hole is etched to form a via hole having a smooth surface and extending through the glass wafer, and eliminating the material layer. The method according to the present invention is able to form a via hole through a glass wafer without allowing formation of an undercut or minute cracks, thereby increasing the yield and reliability of MEMS elements.