The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 25, 2006
Filed:
Feb. 11, 2005
Yiu-hing Chan, Poughkeepsie, NY (US);
Jonathan Chu, Poughkeepsie, NY (US);
George D. Gristede, Katonah, NY (US);
Gregory A. Northrop, Putnam Valley, NY (US);
Yiu-Hing Chan, Poughkeepsie, NY (US);
Jonathan Chu, Poughkeepsie, NY (US);
George D. Gristede, Katonah, NY (US);
Gregory A. Northrop, Putnam Valley, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A physical device layout tool and method. The method and tool receive a user provided schematic with circuit data and placement parameters, including defaults. Further inputs include a definition of cell physical position in the horizontal direction, a definition of the cell's vertical stacking level, a definition of the cell orientation, a specification of vertical alignment of multiple cell instances, and a definition of vertical spacing between 2 adjacent cell instances. These input parameters are used to generate a layout with the placed circuit elements.