The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 25, 2006
Filed:
Jun. 12, 2002
Junki Asai, Nara, JP;
Junki Asai, Nara, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
In a conventional gated clock generating circuit, different signal delay times are produced depending on the arrangement of interconnection of circuit elements, often causing glitches. To avoid this, a gated clock generating circuit of the invention has a circuit that generates a first gate signal having inversion points synchronous with edges of a continuously pulsating clock signal, a circuit that generates a second gate signal deviated by half the period of the clock signal relative to the first gate signal, and a circuit that turns on and off the output of the clock signal in accordance with the first and second gate signals. Even when inversion points of the first or second gate signal deviate from edges of the clock signal, no glitches result.