The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2006

Filed:

Dec. 24, 2003
Applicants:

Fredrick L. Jenne, Los Gatos, CA (US);

Gary A. Gibbs, San Jose, CA (US);

Inventors:

Fredrick L. Jenne, Los Gatos, CA (US);

Gary A. Gibbs, San Jose, CA (US);

Assignee:

Silicon Magnetic Systems, San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/15 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory storage circuit is provided which includes a plurality of magnetic elements each configured to store bits in a first or a second logic state. The storage circuit may further include a plurality of transistors coupled to at least two of the magnetic elements. Such a plurality of transistors may be collectively configured to store bits in the first and second logic states as well. The memory storage circuit may include circuitry configured to load bits from a set of the magnetic elements into the plurality of transistors. Another circuit is provided which includes a magnetic element interposed between a bit line and an electrode. The circuit may further include a first set of circuitry configured to induce current flow through the magnetic element in a direction from the electrode to the bit line. A method for operating a memory storage circuit with the aforementioned configurations is also provided.


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