The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 25, 2006
Filed:
Oct. 18, 2003
Raffi N Elmadjian, Arcadia, CA (US);
Edwin W Sabin, Redondo Beach, CA (US);
Harvey N Rogers, Playa Del Rey, CA (US);
Raffi N Elmadjian, Arcadia, CA (US);
Edwin W Sabin, Redondo Beach, CA (US);
Harvey N Rogers, Playa Del Rey, CA (US);
Northrop Grumman Corporation, Los Angeles, CA (US);
Abstract
A method () for etching a through via () on a wafer () of semiconductor material (), wherein the wafer () has a front side surface () and a backside surface (), is described. A layer of photoresist material () is applied to the backside surface (). The layer of photoresist () is then exposed to a light source through a mask having a pre-selected pattern, wherein the developed photoresist is removed to form at least one via () in the remaining photoresist layer (). The remaining photoresist layer () is then baked in order to form a hardened, remaining photoresist layer (). The semiconductor material 102 adjacent to the at least one via () is then gas plasma etched to form a through via () between the backside surface () and the front side surface (). The hardened, remaining photoresist layer () is then removed and a layer of conductive material () is then applied to the surface of the through via () to establish electrical connectivity between the backside surface () and the front side surface ().