The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2006

Filed:

Sep. 10, 2004
Applicants:

Marco Gaeta, Sant'Angelo Lodigiano, IT;

Giacomino Bollati, Castel San Giovanni, IT;

Inventors:

Marco Gaeta, Sant'Angelo Lodigiano, IT;

Giacomino Bollati, Castel San Giovanni, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
Abstract

A step gain-variable CMOS amplifier includes an input pair of transistors, a bias current generator connected between a common source node of the input pair of transistors and a ground node, and a pair of load transistors. The pair of load transistors is connected between a supply voltage node and, respectively, to the drain nodes of the input pair of transistors. The CMOS amplifier includes a plurality of second input pairs of transistors to be connected in parallel to the input pair of transistors for increasing the effective width of the resultant transistors. Alternativelty, the CMOS amplifier includes a plurality of second load pairs of transistors to be connected in parallel to the load pair of transistors for increasing the effective width of the resultant transistors. Pairs of path selection switches may be programmably closed for connecting in parallel the selected pairs of transistors.


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