The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2006
Filed:
Jun. 30, 2004
Andrew Draper, Chesham, GB;
Edward Flaherty, Kingston Bagpuize, GB;
Andrew Draper, Chesham, GB;
Edward Flaherty, Kingston Bagpuize, GB;
Altera Corporation, San Jose, CA (US);
Abstract
In a programmable logic device system, including a programmable logic device, a configuration memory device, for storing configuration information, and a host computer system, for generating updated configuration information, the programmable logic device has a JTAG port, for connection to said host computer system, for receiving said updated configuration information, a JTAG port controller, operatively connected to the first JTAG port, and an SPI interface, for connection to said configuration memory device. The JTAG port controller comprises a scan chain, for controlling said SPI interface on the basis of information received from said host computer system. This allows a user of the host computer system to transfer updated configuration data to the configuration memory device by means of a connection from the host computer system to the JTAG port of the programmable logic device. Since the user will in any event require a connection from the host computer system to the JTAG port of the programmable logic device to allow testing of the device, this will avoid the need for the user to continually switch connections on the programmable logic device.