The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2006

Filed:

Jul. 25, 2001
Applicant:

Toshiharu Yanagida, Tokyo, JP;

Inventor:

Toshiharu Yanagida, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A process of production of a semiconductor apparatus which can suppress a rise in the electrical resistance and a decline in the joint strength at the bump connection interfaces and improve the connection reliability when using the method of reinforcing the bases of the bumps by a resin film. Bumps are formed on a semiconductor wafer formed with a pattern circuit of a semiconductor chip so as to connect to the circuit pattern, a resin film is formed on the bump forming surface of the semiconductor wafer to a thickness giving a surface lower than the height of the bumps while sealing the spaces between the bumps, plasma cleaning etc., is used to remove the sealing resin components deposited on the surface portions of the bumps or natural oxides or other insulating impurities to clean and activate the surfaces of the bumps, and the chip is mounted on a mounting board.


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