The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2006

Filed:

Dec. 22, 2004
Applicants:

Toshiyuki Kondo, Yokkaichi, JP;

Katsumasa Hayashi, Yokkaichi, JP;

Tomoya Osaki, Yokohama, JP;

Seishi Irie, Yokohama, JP;

Inventors:

Toshiyuki Kondo, Yokkaichi, JP;

Katsumasa Hayashi, Yokkaichi, JP;

Tomoya Osaki, Yokohama, JP;

Seishi Irie, Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device includes a cell array having matrix-like arrayed plural SRAMs on a semiconductor substrate having an N-well and P-well. The N-well and the P-well are isolated from each other with an isolation region each having a shallow trench structure. Each memory cell includes two CMOS inverter circuits having input and output nodes making a cross-coupled connection. First and second capacitors are connected between each gate node of two CMOS inverter circuits and the N-well and/or N-well.


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