The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2006

Filed:

Jun. 27, 2001
Applicants:

Bhanwar Singh, Morgan Hill, CA (US);

Ramkumar Subramanian, San Jose, CA (US);

Bharath Rangarajan, Santa Clara, CA (US);

Michael K. Templeton, Atherton, CA (US);

Inventors:

Bhanwar Singh, Morgan Hill, CA (US);

Ramkumar Subramanian, San Jose, CA (US);

Bharath Rangarajan, Santa Clara, CA (US);

Michael K. Templeton, Atherton, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01); H01L 21/3065 (2006.01);
U.S. Cl.
CPC ...
Abstract

One aspect of the present invention relates to a method for making a dual damascene pattern in an insulative layer in a single etch process involving providing a wafer having at least one insulative layer formed thereon; depositing a first photoresist layer over the at least one insulative layer; patterning a first image into the first photoresist layer; curing the first patterned photoresist layer; depositing a second photoresist layer over the first patterned photoresist layer; patterning a second image into the second photoresist layer; and etching the at least one insulative layer through the first patterned photoresist layer and the second patterned photoresist layer simultaneously in the single etch process.


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