The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2006
Filed:
Oct. 10, 2003
John H Cook, Iii, Fort Collins, CO (US);
Alan S Krech, Jr., Fort Collins, CO (US);
Stephen D Jordan, Ft Collins, CO (US);
Edmundo DE LA Puente, Cupertino, CA (US);
John M Freesman, Fort Collins, CO (US);
John H Cook, III, Fort Collins, CO (US);
Alan S Krech, Jr., Fort Collins, CO (US);
Stephen D Jordan, Ft Collins, CO (US);
Edmundo De La Puente, Cupertino, CA (US);
John M Freesman, Fort Collins, CO (US);
Agilent Technologies, Inc., Palo Alto, CA (US);
Abstract
The problem of sequentially 'squeezing' small fields of data in a larger data path in and out of a memory device can be solved in an algorithmically driven memory tester by defining sub-vectors to represent data in the small field, where a sequence of sub-vectors represents the data that would be represented by a full sized vector if such a full sized vector could be applied to the DUT. A programming construct in the programming language of the algorithmically driven memory tester allows sub-vectors to be defined, as well as an arbitrary mapping that each is to have. The arbitrary mapping is not static, but changes dynamically as different sub-vectors are encountered. Arbitrary dynamic mappings change as sub-vectors are processed, and may include the notion that, during the activity for a sub-vector, this (or these) bit(s) of a vector do not (presently) map to any pin at all of the DUT. The arbitrary dynamic mapping is implemented by a collection of MUX's configured by data stored ahead of time in an SRAM, in accordance with what defining program constructs are encountered by the compiler as it processes the test program. A dynamic reverse mapper, also a collection of MUX's similarly controlled by an SRAM, serves as a de-serializer that assembles a sequence of received sub-vectors into a final received full-sized vector.