The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2006
Filed:
Sep. 25, 2003
Robert Allan Faust, Austin, TX (US);
John Daniel Upton, Georgetown, TX (US);
Robert Allan Faust, Austin, TX (US);
John Daniel Upton, Georgetown, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of accessing an embedded microcontroller, by programmably selecting pins of the microcontroller for use as test lines, receiving a scan command at an input test line pin, emulating a virtual scan path through a logical block of the microcontroller, and transmitting scan results to an output test line pin. The microcontroller can provide such emulation of scan testing in compliance with the JTAG standard for a test access port and boundary-scan architecture. The test line pins are interconnected with a test bus structure to form a scan ring with other components of a data processing system, such as a microprocessor. The emulation can be used to change a functional mode of the microcontroller, or gather diagnostic information after a system error. The microcontroller assigns a high-priority internal interrupt routine to service test line pin activity. The virtual scan path need not include all internal microcontroller resources, and the scan path can be programmably varied by the application designer.