The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7074682 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 11, 2006

Filed:

Sep. 27, 2004
Applicants:

Jum Soo Kim, Icheon, KR;

Sung Mun Jung, Kyungki-do, KR;

Inventors:

Jum Soo Kim, Icheon, KR;

Sung Mun Jung, Kyungki-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/71 (2006.01);
U.S. Cl.
CPC ...
Abstract

In order to provide a method for preventing the channel length from being shortened as well as reducing the SAS resistance, the semiconductor device according to the present invention is manufactured by forming continuous linear trench lines on a semiconductor substrate, forming gate oxide lines on the semiconductor substrate between the trench lines, forming gate lines on the trench lines and the gate oxide lines, the gate lines being substantially perpendicular to the trench lines, etching the gate oxide lines and trench lines positioned between the gate lines, to form an etched region forming self aligned sources (SASs) by implanting impurity ions into the etched region, forming spacers on sidewalls of the gate lines, and implanting impurity ions in the SAS region using the spacers as a mask.


Find Patent Forward Citations

Kim, Jum. (2006). Method for fabricating a semiconductor device having self aligned source (sas) crossing trench (U.S. Patent No. 7074682). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7074682

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