The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2006

Filed:

Sep. 28, 2001
Applicants:

Siddhartha Bhowmik, Allentown, PA (US);

Sailesh Mansinh Merchant, Orlando, FL (US);

Darrell L. Simpson, Gotha, FL (US);

Inventors:

Siddhartha Bhowmik, Allentown, PA (US);

Sailesh Mansinh Merchant, Orlando, FL (US);

Darrell L. Simpson, Gotha, FL (US);

Assignee:

Agere Systems, Inc., Allentown, PA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

An interconnect structure of a semiconductor device includes a tungsten plug () deposited in a via or contact window (). A barrier layer () separates the tungsten plug () from the surface of a dielectric material () within which the contact window or via () is formed. The barrier layer () is a composite of at least two films. The first film formed on the surface of the dielectric material () within the via () is a tungsten silicide film (). The second film is a tungsten film () formed on the tungsten silicide film (). A tungsten plug () is formed on the tungsten film () to complete interconnect structure. The barrier layer () is deposited using a sputtering technique performed in a deposition chamber. The chamber includes tungsten silicide target () from which the tungsten silicide film () is deposited, and a tungsten coil () from which the tungsten film () is deposited.


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