The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2006

Filed:

Aug. 13, 2003
Applicants:

Naoki Matsunaga, Tokyo, JP;

Kenji Sera, Tokyo, JP;

Inventors:

Naoki Matsunaga, Tokyo, JP;

Kenji Sera, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a thin film transistor including an electrically insulating substrate, a semiconductor layer formed on the substrate, and source and drain electrodes formed above source and drain regions formed in the semiconductor layer, the source and drain electrodes being composed of aluminum or aluminum alloy, the method including the steps of forming a gate electrode, implanting impurity ions into the semiconductor layer for forming the source and drain regions, forming an interlayer insulating film entirely over the substrate, forming contact holes throughout the interlayer insulating film such that the source and drain regions are exposed through the contact holes, forming an electrically conductive film composed of aluminum or aluminum alloy, in the contact holes for forming the source and drain electrodes, and thermally annealing the substrate at 275 to 350 degrees centigrade for 1.5 to 3 hours in inert atmosphere.


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