The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2006

Filed:

Dec. 08, 2003
Applicants:

Gonzalo Amador, Dallas, TX (US);

Roger J. Stierman, Dallas, TX (US);

Inventors:

Gonzalo Amador, Dallas, TX (US);

Roger J. Stierman, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and an apparatus for uniform electroless plating of layers onto exposed metallizations in integrated circuits such as bond pads. The apparatus provides means for holding a plurality of wafers, and rotating each wafer at constant speed and synchronous within the plurality. Immersed in a plating solution flowing in substantially laminar motion and at constant speed, the method creates periodic superposition of directions and speeds of the motion of the wafers and the motion of the plating solution. The invention creates periodically changing wafer portions where the directions and speeds are additive and where the directions and speeds are opposed and subtractive. Consequently, highly uniformly layers are electrolessly plated onto the exposed metallizations of bond pads. If the plated layers are bondable metals, the process transforms otherwise unbondable pad metallization into bondable pads.


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