The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2006
Filed:
Oct. 09, 2002
Applicants:
Atsushi Hirabayashi, Tokyo, JP;
Kenji Komori, Kanagawa, JP;
Inventors:
Atsushi Hirabayashi, Tokyo, JP;
Kenji Komori, Kanagawa, JP;
Assignee:
Sony Corporation, , JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
An amplifier circuit includes a CMOS inverter circuit that eliminates a DC offset caused by variations in characteristics of elements in each manufacturing process and is thus applicable to analog signal processing. The CMOS inverter circuit includes a PMOS transistor, a first NMOS transistor, a second NMOS transistor connected to the first NMOS transistor to increase a source voltage of the first NMOS transistor, and DC offset detecting means for detecting a DC offset and for applying a voltage adjusted so as to reduce the DC offset to a gate of the second NMOS transistor.