The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2006
Filed:
Aug. 26, 2003
Applicants:
Matthew Russell, Burnsville, MN (US);
Dushyant Narayen, Sunnyvale, CA (US);
Dongyi Zhou, Sunnyvale, CA (US);
Inventors:
Matthew Russell, Burnsville, MN (US);
Dushyant Narayen, Sunnyvale, CA (US);
Dongyi Zhou, Sunnyvale, CA (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/10 (2006.01);
U.S. Cl.
CPC ...
Abstract
A bus layout design is provided which includes a first electrically conductive layer with a first bus and a second bus and a second electrically conductive layer with a first bus and a second bus. Vias are provided between the first electrically conductive layer and the second electrically conductive layer such that the first bus and the second bus of the first electrically conductive layer are electrically connected.