The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2006
Filed:
Nov. 18, 2002
Andreas Warloe, Fountain Valley, CA (US);
Michael J. Field, Huntington Beach, CA (US);
Andreas Warloe, Fountain Valley, CA (US);
Michael J. Field, Huntington Beach, CA (US);
RF Micro Devices, Inc., Greensboro, NC (US);
Abstract
The address translation logic of the present invention is incorporated in a global positioning system (GPS) receiver and operates to group data in memory based on translating the address from a direct memory access controller. The data includes post-correlated samples of the correlation of a signal with a generated frequency and a generated code having a plurality of time offsets. In general, the address translation logic organizes the data such that each element of the data associated with particular ones of the plurality of time offsets are grouped together in order to improve the efficiency of performing a fast Fourier transform of the data. In addition, the address translation logic allows the transfer of data from correlation circuitry to memory, from the memory to an FFT module, and from the FFT module to the memory using standard DMA controllers.