The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2006
Filed:
Feb. 09, 2005
James W. Dawson, Poughkeepsie, NY (US);
Thomas J. Knips, Wappingers Falls, NY (US);
Donald W. Plass, Poughkeepsie, NY (US);
Kenneth J. Reyer, Stormville, NY (US);
James W. Dawson, Poughkeepsie, NY (US);
Thomas J. Knips, Wappingers Falls, NY (US);
Donald W. Plass, Poughkeepsie, NY (US);
Kenneth J. Reyer, Stormville, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An apparatus for implementing multiple memory column redundancy within an individual memory array includes a plurality of memory array elements internally partitioned into at least a pair of subcolumn elements. At least one spare memory element is configured at a size corresponding to one of the subcolumn elements. An input redundancy multiplexing stage and an output redundancy multiplexing stage are configured for steering around one or more defective memory array elements, and an input bit decoding stage and an output bit decoding stage are configured for implementing an additional, external multiplexing stage with respect to the input redundancy multiplexing stage and the output redundancy multiplexing stage.