Substrate electrical bounce compensation circuitry for digital cinematography image capture cameras

Abstract

A charge coupled device (CCD) circuit employing substrate electrical bounce compensation circuitry that is particularly useful in a cinematography digital image capture cameras. An exemplary CCD circuit comprises a CCD array having a substrate that is coupled to an output node. The output of the CCD array (substrate) is coupled to a gate input of a reset field effect transistor (FET). The output node is coupled to a source input of the reset FET. The output of the CCD array is coupled to the substrate bounce compensation circuit which provides a video pedestal reference signal for the reset FET. The substrate bounce compensation circuit includes a capacitor that capacitively coupled the output of the CCD array to the drain of the reset FET, and a resistor that resistively couples the drain of the reset FET to a reset drain bias capacitor. The substrate bounce compensation circuit thus comprises substrate feedback circuitry coupled to the output node that allows the video pedestal to track and thereby suppress substrate bounce generated through a parallel drive signal that would otherwise cause output signal interference at high frame rates.