The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 20, 2006
Filed:
Jun. 15, 2005
Douglas A. Garrity, Gilbert, AZ (US);
Brandt Braswell, Chandler, AZ (US);
Thierry Cassagnes, Tournefeuille, FR;
Christopher J. Cavanagh, Queen Creek, AZ (US);
Mohammad Nlzam U Kablr, Tempe, AZ (US);
David R. Locascio, Chandler, AZ (US);
Douglas A. Garrity, Gilbert, AZ (US);
Brandt Braswell, Chandler, AZ (US);
Thierry Cassagnes, Tournefeuille, FR;
Christopher J. Cavanagh, Queen Creek, AZ (US);
Mohammad Nlzam U Kablr, Tempe, AZ (US);
David R. LoCascio, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A pipelined analog to digital converter ('ADC') as described herein is capable of processing two or more input channels. The analog input voltages from the multiple channels are concurrently sampled (every other clock phase) using isolated input stages. The outputs of the input stages are concurrently sampled (every other clock phase) by a delay/holding and synchronization ('DHS') stage. The DHS stage processes the samples using a double sampling technique, generates residual voltage samples (every clock phase), and generates digital outputs for the multiple channels in an alternating manner. The DHS stage provides equal input loading for the input stages, which enhances the performance of the ADC.