The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7064698 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 20, 2006

Filed:

Jun. 19, 2003
Applicants:

Matthias Locher, San Jose, CA (US);

Leonardo Della Pietra, Zürich, CH;

Inventors:

Matthias Locher, San Jose, CA (US);

Leonardo Della Pietra, Zürich, CH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The circuit arrangement has a sigma-delta converter () for converting an analog input signal into a digital output signal. The sigma-delta converter () contains a loop filter, a comparator connected downstream of the latter and a feedback loop to feed the output signal back to the input signal. To reduce idle tones a dither signal is fed to the comparator by means of a dither-signal line (). The dither signal is not however generated by a complex dither-signal generator. Instead, what is used as a dither signal is a signal that is available in the circuit but is not specifically generated for this purpose, e.g. an output signal from a second sigma-delta converter ('). The circuit arrangement is thus simpler and less expensive than conventional circuit arrangements without its reduction of idle tones suffering.


Find Patent Forward Citations

Locher, Matthias. (2006). Circuit arrangement and method for sigma-delta conversion with reduced idle tones (U.S. Patent No. 7064698). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7064698

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