The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2006
Filed:
Jul. 13, 2001
Gyudong Kim, San Jose, CA (US);
Min-kyu Kim, Cupertino, CA (US);
Ook Kim, Palo Alto, CA (US);
Eric A. Lee, San Jose, CA (US);
Bruce Kim, Los Altos, CA (US);
Gyudong Kim, San Jose, CA (US);
Min-Kyu Kim, Cupertino, CA (US);
Ook Kim, Palo Alto, CA (US);
Eric A. Lee, San Jose, CA (US);
Bruce Kim, Los Altos, CA (US);
Silicon Image, Inc., Sunnyvale, CA (US);
Abstract
A scheme for reducing jitter in high-speed digital communication by adaptively controlling the loop bandwidth of a receiver PLL to reduce the relative jitter between the recovered data and clock. The scheme uses phase pointer activity to represent the relative jitter. The phase pointer activity is measured and used to control the receiver PLL loop bandwidth. The receiver PLL loop bandwidth is repeatedly incremented or decremented by a step size based on the comparison between a newly measured activity value and the old activity value, until the phase pointer activity reaches a minimum. Because the PLL performance requirement of the transmitter can be relaxed, compatibility with legacy transmitters and multi-vendor transmitters is enhanced. Because tight control of fabrication process parameters of PLLs may be relaxed, the fabrication yield may also be improved.