The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2006
Filed:
Feb. 18, 2005
Akira Sugiura, Kasugai, JP;
Takaaki Furuyama, Kasugai, JP;
Akira Sugiura, Kasugai, JP;
Takaaki Furuyama, Kasugai, JP;
Spansion LLC, Sunnyvale, CA (US);
Abstract
A semiconductor memory device includes a memory block having memory cells connected to global bit lines and global word lines are arranged in matrix constitutes a memory block column sharing global bit lines, the memory block column being developed in global word line wiring direction, wherein at least two of memory block columns adjoining each other constitute a to-be-remedied unit, and redundant block(s), which is/are arranged sharing global bit lines with the memory block column(s), which is/are provided in each to-be-remedied unit and number of redundant block(s) is/are smaller than that of memory block column(s) included in the to-be-remedied unit. A minimum number of redundant memory blocks necessary for defectiveness remedy can be provided thereby enhancing the yield with optimization of the manufacturing and circuits. Redundancy remedy efficiency can also be improved while minimizing increased chip die size of the semiconductor memory device.