The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2006
Filed:
Apr. 09, 2002
Gregory Scott Bright, Kirkland, WA (US);
Scott W. Straka, Kirkland, WA (US);
Philip C. Black, Woodbridge, CT (US);
James G. Moore, Guilford, CT (US);
John R. Lewis, Bellevue, WA (US);
Hakan Urey, Redmond, WA (US);
Clarence T. Tegreene, Redmond, WA (US);
Gregory Scott Bright, Kirkland, WA (US);
Scott W. Straka, Kirkland, WA (US);
Philip C. Black, Woodbridge, CT (US);
James G. Moore, Guilford, CT (US);
John R. Lewis, Bellevue, WA (US);
Hakan Urey, Redmond, WA (US);
Clarence T. Tegreene, Redmond, WA (US);
Microvision, Inc., Redmond, WA (US);
Abstract
A scanning control circuit generates a clock signal corresponding to an expected scan timing of a resonant scanner. In one approach, the control circuit uses a pair of direct digital synthesis (DDS) integrated circuits. A first DDS chip provides a system clock that is synchronized to the monitored period of the scanner. A second DDS chip generates a frequency chirped signal that has a frequency profile corresponding to a desired pixel clock timing. To control phase precisely, four complementary clock signals are weighted and mixed at light source drivers to produce relative phase shifts for different light sources.