The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2006

Filed:

Nov. 12, 2004
Applicant:

Takahito Fukushima, Chiba, JP;

Inventor:

Takahito Fukushima, Chiba, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock generating circuit includes a delay circuit which has input terminals and which delays a signal input from each of the input terminals by a different delay time, and outputs the delayed signal from at least one output terminal, a selective circuit which receives an input clock signal and selectively outputs the clock signal to one of the input terminals of the delay circuit, and a control circuit which switches selective operations of the selective circuit. A modulated clock signal in which the period of the clock signal is increased or decreased is output from the at least one output terminal of the delay circuit such that the control circuit sequentially switches the selective operations of the selective circuit.


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