The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2006

Filed:

Aug. 24, 2004
Applicants:

John T. Pham, Fairfax, VA (US);

John D. Bruno, Bowie, MD (US);

Richard L. Tober, Elkridge, MD (US);

Inventors:

John T. Pham, Fairfax, VA (US);

John D. Bruno, Bowie, MD (US);

Richard L. Tober, Elkridge, MD (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/15 (2006.01); H01L 23/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed are a semiconductor device and method of manufacturing the same comprising a substrate, a mesa region adjacent to the substrate, an electroplated metal layer, for reducing the thermal resistance of the device, surrounding the mesa region, an insulator layer separating a side portion of the mesa region from the electroplated metal layer, a heat sink, a bonding layer adjacent to the heat sink, and a second metal layer in between the substrate and the heat sink, wherein the substrate is adjacent to the bonding layer, and wherein the electroplated metal layer dimensioned and configured to have a thickness of at least half a thickness of the mesa region; and to laterally spread heat away from the mesa region. The mesa region comprises a first cladding layer adjacent to the substrate, an active region adjacent the first cladding layer, and a second cladding layer adjacent to the active region.


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