The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2006
Filed:
Jun. 05, 2003
Keiichiro Kata, Kanagawa, JP;
Hirokazu Honda, Kanagawa, JP;
Kazuhiro Baba, Kanagawa, JP;
Tadanori Shimoto, Kanagawa, JP;
Katsumi Kikuchi, Kanagawa, JP;
Rokuro Kambe, Kagoya, JP;
Satoshi Hirano, Aichi, JP;
Shinya Miyamoto, Aichi, JP;
Keiichiro Kata, Kanagawa, JP;
Hirokazu Honda, Kanagawa, JP;
Kazuhiro Baba, Kanagawa, JP;
Tadanori Shimoto, Kanagawa, JP;
Katsumi Kikuchi, Kanagawa, JP;
Rokuro Kambe, Kagoya, JP;
Satoshi Hirano, Aichi, JP;
Shinya Miyamoto, Aichi, JP;
NGK Spark Plug Co., Ltd., Aichi, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.