Method and circuit for generating memory addresses for a memory buffer

Abstract

A method for generating sequences of memory addresses for a memory buffer having N*M locations includes making a first address and a last address of every sequence respectively equal to 0 and to N*M−1, assigning a first sequence of addresses, and each address but a last address of another sequence of addresses is generated by multiplying a corresponding address of a previous sequence by N, and performing a modular reduction of this product with respect to N*M−1. The method further includes calculating a greatest bit length of every address, and calculating an auxiliary constant as the modular reduction with respect to N*M−1 of the power of two raised to twice the greatest bit length. Each sequence of addresses includes storing an auxiliary parameter equal to an N+1address of the current sequence, computing a first factor as the modular product with respect to N*M−1 of the auxiliary constant based upon a ratio between the auxiliary parameter and the power of two raised to the greatest bit length, and generating all addresses but the last of a sequence by performing the Montgomery algorithm using the first factor and an address index varying from 0 to N*M−2 as factors of the Montgomery algorithm, and with the quantity N*M−1 as modulus of the Montgomery algorithm, and the greatest bit length as the number of iterations of the Montgomery algorithm.