The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2006
Filed:
Jul. 31, 2003
Daniel James Henderson, Georgetown, TX (US);
Alongkorn Kitamorn, Austin, TX (US);
Wayne L. Lemmon, Rochester, MN (US);
Naresh Nayar, Rochester, MN (US);
Ravi A. Shankar, Austin, TX (US);
Daniel James Henderson, Georgetown, TX (US);
Alongkorn Kitamorn, Austin, TX (US);
Wayne L. Lemmon, Rochester, MN (US);
Naresh Nayar, Rochester, MN (US);
Ravi A. Shankar, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and apparatus for coordinating dynamic memory page deallocation with a redundant bit line steering mechanism are provided. With the method and apparatus, memory scrubbing and redundant bit line steering operations are performed in parallel with handling of notifications of runtime correctable errors. When a correctable error is encountered during runtime, and the correctable error is determined to be persistent, then dynamic memory page deallocation is requested of a hypervisor. The determination of persistence is based on a history CE table that is populated by the operation of the memory scrubbing and redundant bit line steering mechanism of a service processor. Thus, only those correctable errors that persist for longer than one memory scrubbing cycle are subject to memory page deallocation.