The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2006

Filed:

Jan. 28, 2004
Applicant:

Johannes K. Notthoff, Vista, CA (US);

Inventor:

Johannes K. Notthoff, Vista, CA (US);

Assignee:

Northop Grumman Corporation, Los Angeles, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides systems and methods that utilize inductive current steering to improve logic circuit performance by mitigating propagation delays associated with conventional transistor current steering. The system and methods employ RF transformers, wherein energizing primary windings induce current in associated secondary windings. In one aspect, a single clock bus is employed to induce the current, which is routed via respective ends of the secondary winding to emitter leads of the transistors. This current and voltage is 180 degrees out-of-phase such that one transistor is 'on' while the other is 'off,' which generates a differential output. In another aspect, a differential clock signal is employed to induce the current in secondary windings and associated transistor emitters. Further, the systems and methods can be utilized to construct flip-flops and shift registers by coupling differential transistor pairs and driving these pairs with the transformer-based single-ended or differential clock.


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