The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7057918 B1

PDF
Full Text
Expired
Date of Patent:
Jun. 06, 2006

Filed:

Mar. 01, 2004
Applicant:

Cheng-yen Huang, Hsinchu, TW;

Inventor:

Cheng-Yen Huang, Hsinchu, TW;

Assignee:

Faraday Technology Corp., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory unit and memory module using the same. The memory module at least has a first memory region with a plurality of memory units. In each memory unit, first and access transistors each have a first terminal coupled to one bit line pair respectively. A latch node is coupled between second terminals of the first and second access transistor to latch data. An OR gate has a first input terminal coupled to a word line, an output terminal coupled to gates of the first and second access transistor, and a second input terminal. The second input terminals of the OR gates in all memory units are coupled to a flush line. Invalidation information is written to the latch nodes in the memory units from the bit line pair when the flush line is activated during a flush operation.


Find Patent Forward Citations

Huang, Cheng-Yen. (2006). Memory unit and memory module using the same (U.S. Patent No. 7057918). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7057918

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