The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2006
Filed:
Jul. 15, 2004
Sanjay Wadhwa, Gurgaon, IN;
Kulbhushan Misri, Gurgaon, IN;
Deeya Muhury, Ranchi, IN;
Murugesan Raman, Madurai, IN;
Sanjay Wadhwa, Gurgaon, IN;
Kulbhushan Misri, Gurgaon, IN;
Deeya Muhury, Ranchi, IN;
Murugesan Raman, Madurai, IN;
Freescale Semiconductor, INC, Austin, TX (US);
Abstract
A power on reset (POR) circuit for providing a reset pulse signal to a chip when power supply voltage, VDD, ramps up so that the chip always starts in a known state. The POR circuit generates the reset pulse as soon as VDD exceeds an assertion voltage. The assertion voltage is independent of the ramp rate of VDD. The POR circuit is shut off as soon as the reset signal is generated, thereby drawing zero steady state current from VDD. The re-arm time for the POR circuit is very small. The POR circuit does not reset the chip when there is a dynamic change in VDD.