The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2006
Filed:
Jun. 18, 2004
Marco Seibt, Ruhpolding, DE;
Werner Ludorf, Ruhpolding, DE;
Stefan Zudrell-koch, Dornbirn, AT;
Günter Marent, Bartholomaeberg, AT;
Marco Seibt, Ruhpolding, DE;
Werner Ludorf, Ruhpolding, DE;
Stefan Zudrell-Koch, Dornbirn, AT;
Günter Marent, Bartholomaeberg, AT;
TridonicAtco GmbH & Co. KG, Dornbirn, AT;
Abstract
In an electronic ballast the output d.c. voltage (U) of a PFC intermediate circuit () is to be regulated. The intermediate circuit () has a clocked switch (S) which is controlled by a regulation circuit (). The regulation circuit () includes two counters (Z, Z). The counter (Z) has a greater number of count stages than the counter (Z). The counter (Z) is counted upwards or downwards in dependence upon the regulation difference. The counter (Z) is repeatedly counted only in one direction and for example reset by a reset signal. By comparing the counts of corresponding count stages of the two counters (Z) and (Z) in a comparator, the switch on time (t) for the clock switch (S) is determined.