The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2006
Filed:
Apr. 05, 2001
Robert Osann, Jr., Los Altos, CA (US);
Patrick Hallinan, Campbell, CA (US);
Jung Lee, Sunnyvale, CA (US);
Shridhar Mukund, San Jose, CA (US);
Robert Osann, Jr., Los Altos, CA (US);
Patrick Hallinan, Campbell, CA (US);
Jung Lee, Sunnyvale, CA (US);
Shridhar Mukund, San Jose, CA (US);
Lightspeed Semiconductor Corp., Santa Clara, CA (US);
Abstract
A programmable logic array (PLA) in accordance with the invention achieves a maximum amount of depopulation of programmable connections while still implementing a logic function and maintaining flexibility for future reprogramming. In addition, a PLA in accordance with the invention can be built so that no matter what functionality is programmed, performance characteristics for the device are maintained. Further, a PLA in accordance with the invention does not require a regular array structure.